module led_twinkle(
	Clk,
	Reset_n,
	Led
);
	input Clk;
	input Reset_n;
	output reg Led;
	
	reg[24:0] counter;
	
	always@(posedge Clk or negedge Reset_n)
		if(!Reset_n) begin
			counter <= 0;
			Led <= 0;
			end
		else if(counter == 25_000_000-1) begin
			counter <= 0;
			Led <= !Led;
			end
		else
			counter <= counter + 1'd1;

endmodule
